The semiconductor industry is facing increasingly difficult technological challenges, as it moves into the production of features at sizes below 100 nanometers. Particular challenges are to achieve affordable scaling and achieve affordable lithography with dimensions below 100 nanometers, utilize new materials and structures, and achieve gigahertz frequency operations and very high device densities on chips. There is a lack of consensus in the industry about how to solve the fabrication challenges that lie beyond the 100 nanometer barrier. The problem confronting the industry is that the dominant technology used to make chips, optical lithography, uses light to form patterns on silicon. Below 100 nanometers, the wavelength of light that is, typically, employed in chip production (193 nanometers and 157 nanometers) is too large to be useful. Several candidate technologies are currently vying for selection as successors to optical lithography. These include extreme ultraviolet lithography (EUV), an electron beam method called scalpel, and x-ray lithography. None has yet emerged as the preferred choice.
It is widely recognized that the development of molecular electronics based on carbon nanotubes would enable logic devices to be built that have billions of transistors. Such computers would be orders of magnitude more powerful than today's machines. In order for this to become a reality, a method must be found to mass produce the molecular electronic devices. Scanning probe methods have proven feasible for fabricating single devices one nanotube at a time, but no way has been found yet to speed up the process sufficiently to make billions of transistors practical. Chemical based self-assembly processes have also been suggested, but so far, only the simplest structures have been built by use of this method. The problem of combining different materials and assembling molecular electronic devices with specific features remains a significant challenge. Therefore, it would be desirable to demonstrate the feasibility of cost-effectively fabricating carbon nanotube molecular electronic devices that have a nanosize diameter (e.g., 0.7-50 nanometers), micron-to-submicron-sized length (e.g., 100-1000 nanometers), and a gate structure that is a few nanometers long (e.g., 0.1-5 nanometers).
A nanotube or nanotube bundle/rope is typically much longer that 1 nanometer. Therefore, many inputs or junctions are needed along the length of each nanotube or nanotube rope to achieve desired nanoscale density. Nanotube junctions, or active nanotube junctions, are locations or points were nanotubes are in close proximity to each other and can be modified electrically.
Theoretical work by Chico et al., “Pure carbon nanoscale devices: nanotube heterojunctions,” Physical Review Letters, 1996, has suggested that introducing pentagon-heptagon pair defects into otherwise hexagonal nanotube structure may create junctions between two topologically or electrically different nanotubes, as bases for nanoscale nanotube devices. S. Saito, “Carbon nanotubes for next generation electronic devices,” Science, 1997, describes possible theoretical designs of a carbon nanotube that may function as a molecular electronic device. Those and other similar theoretical works outline the possibility to use carbon nanotubes as molecular devices, but fail to propose a design of such device and a method of its fabrication.
Collins et al., “Nanoscale electronic devices on carbon nanotubes,” Fifth Foresight Conference on Molecular Nanotechnology, 1997, have demonstrated experimentally the rectification properties of single-wall carbon nanotubes. This work also fails to propose a design for carbon nanotube molecular electronic devices and a method of fabrication.
Therefore, in order to overcome current fabrication approaches that are expensive and impractical (e.g., placing individual nanotubes on a substrate with an atomic force microscope), a method is needed to mass produce carbon nanotube-based electronic devices in a manner that is efficient, cost-effective, and scalable.